1. Field of the Invention
The present invention relates to an equalizer and a communication system, and more particularly, to an equalizer and a communication system capable of compensating a high frequency component of an input signal without decaying a low frequency component of the input signal.
2. Description of the Prior Art
In a High-Definition Multimedia Interface (HDMI™) system or Universal Serial Bus (USB™) system, since a high frequency component of an input signal decays more seriously than a low frequency component of the input signal in a receiver, when the receiver performs analog to digital conversion determined by levels of 0 and 1, eye diagrams are blurred due to more decay in the high frequency component, such that a high voltage level of the input signal can be hardly distinguished from a low voltage level of the input signal and is unable to be decoded.
Under this circumstance, an equalizer is generally set in receiving terminal of a receiver where the receiver receives input signals in the prior art, for performing analog operations with the input signals, to restore the input signals with natural losses to determinable voltage levels for digital logics, such that the restored input signals comply with signals which transmitters intend to transmit and thus can be utilized for following operations.
For example, please refer to FIG. 1, which illustrates a schematic diagram of a communication system 10 of the prior art. As shown in FIG. 1, the communication system 10 comprises a transmitter 102, transmission lines TL1-TLx and a receiver 104, wherein the communication system 10 can be a HDMI™ system or a USB™ system. The transmitter 102 transmits input signals IN1-INx, such that transmission lines TL1-TLx transmit the input signals IN1-INx to the receiver 104, respectively. The receiver 104 comprises equalizers EQ1-EQx and a processing unit 106. The equalizers EQ1-EQx compensate the input signals IN1-INx, respectively, to restore the input signals IN1-INx to determinable voltage levels to be decoded by digital logics, such that the processing unit 106 can process the input signals IN1-INx compensated by the equalizers EQ1-EQx, e.g. an analog process or a digital process.
Therefore, proper designs for the equalizers to compensate the input signals so as to restore the input signals to determinable voltage levels to be decoded by the digital logics have become an issue in industry.